1. Field of the Invention
The present invention relates generally to random access memory systems, and more particularly relates to an architecture for improving the write margin within magnetic random access memory (MRAM).
2. Description of the Prior Art
Thin film magnetic random access memory (MRAM) has been investigated since the early 1950s. However, as described in the text xe2x80x9cComputer Storage Systems and Technology,xe2x80x9d by Richard E. Matick, John Wiley and Sons (1977), which is incorporated herein by reference, these memories were deemed to be impractical due to narrow write margins and read margins which eroded as device dimensions were scaled. By the early 1970s, semiconductor-based memories, such as dynamic random access memory (DRAM), promised a simpler more compact memory solution than magnetic core memories, the most prevalent random access memory (RAM) available at the time. By the late 1970s, almost all development and production activity related to MRAM had been abandoned.
Recently, a renewed interest in MRAM has been sparked by its application to the non-volatile memory market. New memory devices, such as the Magnetic Tunnel Junctione (MTJ) device, which exhibits magneto resistance, overcame the earlier obstacle of inductive sensing. As summarized in Scheuerlein et al., xe2x80x9cA 10 ns Read and Write Non-Volatile Memory Array Using a Magnetic Tunnel Junction and FET Switch in Each Cell,xe2x80x9d ISSCC 2000, pp. 128-129, desirable characteristics of MTJ-based memories include high integration density, high speed, low read power, and Soft Error Rate (SER) immunity.
FIGS. 1A and 1B depict two alternative configurations found in traditional memory architectures. Like conventional thin film RAM, MTJ RAM uses an architecture in which memory cells 100 are placed at the cross-points of intersecting word and bit lines. In the MTJ MRAM design described by Scheuerlein et. al. (see FIG. 1A), reading of the memory cell has been simplified by the inclusion of a field effect transistor (FET) 102 within each cell for improved isolation. FIG. 1B depicts an alternative higher density MTJ MRAM architecture described by Frank Z. Wang in xe2x80x9cDiode-Free Magnetic Random Access Memory Using Spin-Dependent Tunneling Effect,xe2x80x9d Applied Physics Letters, Vol. 77, No. 13, pp. 2036-2038 (Sep. 25, 2000). In conventional magnetic memory architectures, however, writing individual memory cells without also writing adjacent or other non-intended cells remains a most vexing problem.
Typically, writing a memory cell involves passing electrical currents simultaneously through a bit line and word line, at the intersection of which an intended MTJ cell resides. The selected MTJ cell will experience a magnetic field which is the vector sum of the magnetic fields created by the word and bit line currents. All other MTJ devices that share the same bit line or word line as the selected MTJ device will be half-selected and will thus be subjected to either bit line or word line magnetic fields, respectively. Since the magnitude of the vector sum of the word line and bit line fields is about forty-one percent (41%) larger than the individual word line or bit line fields, the selectivity of a selected MTJ cell over half-selected MTJ cells is poor, especially when the non-uniform switching characteristics of the MTJ cells are considered.
Variations in the shape or size of an MTJ cell can give rise to variations in magnetic thresholds of the MTJ cells which are so large that it is virtually impossible to write a selected cell without also switching some of the half-selected cells, thus placing the reliability and validity of the stored data in question. There may also be environmental or other factors, such as temperature and processing variations, that adversely impact the write select margin. Additionally, creep, which generally refers to the spontaneous switching of a MTJ cell when it is subjected to repeated magnetic field excursions much smaller than its nominal switching field, narrows the acceptable write select margin even further thereby making the need for greater selectivity of individual MTJ cells even more imperative.
FIG. 2A depicts the magnetic selectivity of an ideal thin film magnetic memory element as described by Stoner-Wohlfarth. Assuming that the word line and bit line currents generate fields along the hard magnetic axis 210 and easy magnetic axis 230, respectively, of the magnetic element, the field (Hx, Hy) required to switch the magnetic state of the element must equal or exceed the solid curve or boundary 200. This curve 200, known by those skilled in the art as the switching asteroid, satisfies the relation Hh⅔+He⅔=Hk⅔, where Hh is the hard axis field, He is the easy axis field and Hk is the anisotropy field. A selected cell experiences magnetic fields outside the boundary of the switching asteroid 200 (e.g., corresponding to point 220) which are large enough to write the magnetic element to a state that aligns with the easy axis field direction. The state of a half-selected cell doesn""t change since the magnetic fields acting on it (e.g., corresponding to points 210 and 230) remain within the boundary of the switching asteroid 200.
It is important to consider that, although depicted as a thin fixed boundary line, the switching asteroid 200, in reality, may significantly change shape due to environmental conditions (e.g., temperature) or other factors (e.g., processing variations). Variations between individual MTJ cells substantially reduce the write select margin within the overall memory structure. Nonideal physical artifacts blur the distinction between half-selected and selected cells; the former could be written in a write operation intended only for the latter.
Hence a major hurdle to the realization of practical sub-micron MRAM architectures has been the problem of write selectivity. There is a need, therefore, in the field of magnetic memory devices and systems for an improved write selection mechanism which can be adapted readily to the present MRAM architecture as well as other alternative architectures.
It is an object of the present invention to provide a write architecture for use in a magnetic random access memory (MRAM) system that allows selection of individual MTJ cells in an array without adversely disturbing neighboring cells in the array and thus increasing the integrity of the data stored in the memory array.
It is another object of the present invention to provide an improved write selection architecture and methodology for MRM that is compatible with conventional MRAM systems.
It is yet another object of the present invention to provide a write selection architecture for MRAM that utilizes a substantially reduced bit line current, resulting in lower overall system power consumption.
It is a further object of the present invention to provide a write selection architecture for MRAM that has a substantially increased acceptable write disturb margin and is thus less sensitive to MTJ device mismatches, process variations and other environmental factors within an MRAM array.
The present invention revolutionizes the field of magnetic memory devices by providing an improved write selection architecture and methodology for use with magnetic random access memory (MRAM) that not only allows selection of individual MTJ cells in an array without adversely disturbing neighboring cells in the array, but also reduces the power consumed in the write operation and the overall sensitivity of the circuit to device mismatches, process variations and other environmental factors.
In accordance with one embodiment of the present invention, an improved architecture for selectively writing one or more magnetic memory cells in a magnetic random access memory (MRAM) device comprises one or more global write lines and a plurality of segmented write lines connected thereto. The global write lines are substantially isolated from the magnetic memory cells. A plurality of segmented groups, each segmented group including a plurality of magnetic memory cells, are operatively coupled to each segmented write line. The architecture of the present invention further includes at least one write line current return conductor or path for returning the write current supplied to a selected segmented group of memory cells. At least one segmented group select switch is preferably connected between the write line current return conductor and the segmented write line corresponding to the segmented group, the group select switch including a group select input for receiving a group select signal. The group select switch substantially completes an electrical circuit between the segmented write line and the write line current return conductor in response to the group select signal. Bit lines operatively coupled to the magnetic memory cells are used to write the state of a selected segmented group of memory cells.
In accordance with another embodiment of the present invention, the write line current return conductor is modified to form a write line current return network. The current return network includes a plurality of switches operatively connected between a selected segmented write line conductor and one or more unselected segmented write line conductors. The switches are responsive to at least one select signal, each select signal corresponding to a segmented bit slice, for distributing the return write line current across one or more unselected segmented groups in a predetermined manner.
These and other objects, features and advantages of the present invention will become apparent from the following detailed description of illustrative embodiments thereof, which is to be read in connection with the accompanying drawings, wherein like elements are designated by identical reference numerals throughout the several views.